Non- preemptive off-line mapping multi-job on photonic network on chip

Publication date: Available online 23 September 2016 Source:Nano Communication Networks Author(s): Akram Reza, Reza Faghih Mirzaee The demand for robust computation systems has led to the increment number of processing cores in current chips. The photonic interconnection have suggested as communication on chip infrastructure with high bandwidth, low power consumption and scalable structure. The photonic network on chip provide interconnection to integrate more than hundred processing cores in a chip, thus this structure is suitable for running multi-job on a single chip. In this paper, a chain of off-line mapping multi-job in photonic network on chip have suggested for improve delay and power consumption, which contain scheduling, allocation and mapping algorithm. For instance, the STSF scheduling algorithm improvement of at least 15% in average waiting time, 14% average response time. Furthermore, with STSF/ROW/ROW/LA (scheduling/ allocation/ migration/ mapping) schema, execution time and energy efficiency have been improved up to 32% and 28 %, respectively.
Source: Nano Communication Networks - Category: Nanotechnology Source Type: research